Materials innovation at the atomic scale
Charles Dezelah, Executive Technologist at ASM, discusses how the future of electronics is increasingly defined by materials innovation and atomic scale precision as device architectures grow more complex.
Electronic devices have transitioned beyond planar designs to complex 3D architectures addressing challenges in computational power and energy efficiency. This evolution has been accompanied by an increase in both the number and the diversity of materials used in device fabrication. As a result, continued progress in logic and memory technology now depends critically on the ability to precisely control materials at extremely small dimensions. This is where ASM leads: by discovering, engineering, and controlling new materials at the atomic scale, we are enabling progress that shapes the next-gen technological era.
The growing role of atomic scale deposition
ALD is increasingly becoming one of the most important deposition technologies enabling future electronic devices. As a leader in ALD, ASM plays a central role in translating materials discovery into real-world semiconductor advancements.
This growth is driven by the self-limiting nature of the ALD process, which provides several key capabilities such as
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precise stoichiometric control, allowing the development of novel materials that exhibit the properties required for future devices
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best‑in‑class conformality for vertical structures
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deposition of very thin layers with excellent precision
Logic and memory scaling beyond the current era
Logic technology is a major component of advanced computing underpinning CPUs and GPUs. Following the FinFET era, which began in 2012, the industry has entered the gate‑all‑around (GAA) phase of logic scaling. GAA is expected to sustain device scaling for approximately the next eight years, after which a transition to a complementary FET (CFET) type architecture is anticipated, adding both architectural and materials complexity. These transitions further reinforce the importance of materials innovation - an area where ASM’s materials discovery capabilities position us at the forefront of technological progress.
A second key component of future computing is DRAM. For approximately the past 15 years, the DRAM industry has relied on a 6F² architecture. This approach is nearing its physical limits. In the near future, a move to a vertical channel 4F² architecture, is expected, followed by a transition toward fully three‑dimensional architectures.
Beyond ALD, other deposition technologies also play a critical role. Epitaxy, for example, requires similarly high levels of quality and precision. Epitaxial layers are central to GAA device structures and have become increasingly important in advanced logic.
Expanding materials with power as the constraint
As device complexity increases, so does the range of materials under consideration. Today, nearly the entire periodic table is evaluated for current or future use in electronic devices. This expanded materials set introduces new challenges related to sourcing, availability, long‑term sustainability and ultimately device power: designing films and interfaces that deliver tighter electrical control, reduce leakage, and ultimately enable more efficient computing.
One example of enhanced design enabled by atomic‑scale control is the use of multiple threshold voltages, or multiple Vt, in advanced logic devices. Threshold voltage is a powerful tuning knob that allows designers to modulate chip level power and performance. Today, designers typically use around six distinct Vt layers, separated by only approximately 40 millivolts.
In GAA devices, these threshold voltages are controlled within the gate stack using ALD deposited dipole films. These films typically range from approximately 2 to 10 angstroms in thickness, achieving true monolayer level control.
A second example of enhanced design is area selective deposition. As dimensional scaling with lithography continues, alignment limitations become increasingly problematic. Misalignment between layers, known as edge placement error, can lead to significant yield loss.
Area selective deposition offers a materials-based solution to this challenge by enabling the growth of dielectric layers on other dielectric surfaces while avoiding deposition on adjacent metals. This dielectric‑on‑dielectric selective deposition improves performance and reliability in back‑end‑of‑line interconnects and enables more aggressive interconnect density scaling.
A materials discovery company
At ASM, we enable the innovations that define the next-gen technological era and shape the future of electronics.
As electronic devices continue to evolve, innovation is increasingly driven by materials rather than geometry alone. In this environment, the ability to engineer, deposit, and control materials with atomic precision is a defining requirement for future electronics, because at advanced technology nodes, every monolayer matters.